### [CVE-2018-5407](https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-5407)
![](https://img.shields.io/static/v1?label=Product&message=Processors%20supporting%20Simultaneous%20Multi-Threading&color=blue)
![](https://img.shields.io/static/v1?label=Version&message=n%2Fa&color=blue)
![](https://img.shields.io/static/v1?label=Vulnerability&message=CWE-200&color=brighgreen)

### Description

Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.

### POC

#### Reference
- https://github.com/bbbrumley/portsmash
- https://github.com/bbbrumley/portsmash
- https://www.exploit-db.com/exploits/45785/
- https://www.exploit-db.com/exploits/45785/
- https://www.oracle.com/security-alerts/cpuapr2020.html
- https://www.oracle.com/security-alerts/cpuapr2020.html
- https://www.oracle.com/security-alerts/cpujan2020.html
- https://www.oracle.com/security-alerts/cpujan2020.html
- https://www.oracle.com/technetwork/security-advisory/cpujan2019-5072801.html
- https://www.oracle.com/technetwork/security-advisory/cpujan2019-5072801.html
- https://www.tenable.com/security/tns-2018-16
- https://www.tenable.com/security/tns-2018-16
- https://www.tenable.com/security/tns-2018-17
- https://www.tenable.com/security/tns-2018-17

#### Github
- https://github.com/ARPSyndicate/cvemon
- https://github.com/bbbrumley/portsmash
- https://github.com/codexlynx/hardware-attacks-state-of-the-art
- https://github.com/djschleen/ash
- https://github.com/mrodden/vyger
- https://github.com/nsacyber/Hardware-and-Firmware-Security-Guidance