{ "data_type": "CVE", "data_format": "MITRE", "data_version": "4.0", "CVE_data_meta": { "ID": "CVE-2020-0574", "ASSIGNER": "secure@intel.com", "STATE": "PUBLIC" }, "affects": { "vendor": { "vendor_data": [ { "vendor_name": "Intel", "product": { "product_data": [ { "product_name": "Intel(R) MAX(R) 10 FPGA", "version": { "version_data": [ { "version_value": "All versions" }, { "version_value": "See advisory https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.html" } ] } } ] } } ] } }, "problemtype": { "problemtype_data": [ { "description": [ { "lang": "eng", "value": "Information Disclosure" } ] } ] }, "references": { "reference_data": [ { "refsource": "CONFIRM", "name": "https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.html", "url": "https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00349.html" } ] }, "description": { "description_data": [ { "lang": "eng", "value": "Improper configuration in block design for Intel(R) MAX(R) 10 FPGA all versions may allow an authenticated user to potentially enable escalation of privilege and information disclosure via physical access." } ] } }