mirror of
https://github.com/CVEProject/cvelist.git
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62 lines
2.2 KiB
JSON
62 lines
2.2 KiB
JSON
{
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"data_type": "CVE",
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"data_format": "MITRE",
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"data_version": "4.0",
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"CVE_data_meta": {
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"ID": "CVE-2021-1104",
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"ASSIGNER": "psirt@nvidia.com",
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"STATE": "PUBLIC"
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},
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"affects": {
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"vendor": {
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"vendor_data": [
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{
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"vendor_name": "RISCV.org",
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"product": {
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"product_data": [
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{
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"product_name": "Machine Trap Base Address (MTVEC) Register",
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"version": {
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"version_data": [
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{
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"version_value": "All versions"
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}
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]
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}
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}
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]
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}
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}
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]
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}
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},
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"problemtype": {
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"problemtype_data": [
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{
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"description": [
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{
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"lang": "eng",
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"value": "information disclosure, data tampering and denial of service"
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}
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]
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}
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]
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},
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"references": {
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"reference_data": [
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{
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"refsource": "CONFIRM",
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"name": "https://riscv.org/news/2021/08/video-glitching-risc-v-chips-mtvec-corruption-for-hardening-isa-adam-zabrocki-and-alex-matrosov-def-con-29/",
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"url": "https://riscv.org/news/2021/08/video-glitching-risc-v-chips-mtvec-corruption-for-hardening-isa-adam-zabrocki-and-alex-matrosov-def-con-29/"
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}
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]
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},
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"description": {
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"description_data": [
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{
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"lang": "eng",
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"value": "The RISC-V Instruction Set Manual contains a documented ambiguity for the Machine Trap Vector Base Address (MTVEC) register that may lead to a vulnerability due to the initial state of the register not being defined, potentially leading to information disclosure, data tampering and denial of service."
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}
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]
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}
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} |