2024-05-26 14:27:05 +02:00
### [CVE-2018-5407](https://cve.mitre.org/cgi-bin/cvename.cgi?name=CVE-2018-5407)



### Description
Simultaneous Multi-threading (SMT) in processors can enable local users to exploit software vulnerable to timing attacks via a side-channel timing attack on 'port contention'.
### POC
#### Reference
- https://github.com/bbbrumley/portsmash
2024-06-09 00:33:16 +00:00
- https://github.com/bbbrumley/portsmash
2024-05-26 14:27:05 +02:00
- https://www.exploit-db.com/exploits/45785/
2024-06-09 00:33:16 +00:00
- https://www.exploit-db.com/exploits/45785/
2024-05-26 14:27:05 +02:00
- https://www.oracle.com/security-alerts/cpuapr2020.html
2024-06-09 00:33:16 +00:00
- https://www.oracle.com/security-alerts/cpuapr2020.html
2024-05-26 14:27:05 +02:00
- https://www.oracle.com/security-alerts/cpujan2020.html
2024-06-09 00:33:16 +00:00
- https://www.oracle.com/security-alerts/cpujan2020.html
2024-05-26 14:27:05 +02:00
- https://www.oracle.com/technetwork/security-advisory/cpujan2019-5072801.html
2024-06-09 00:33:16 +00:00
- https://www.oracle.com/technetwork/security-advisory/cpujan2019-5072801.html
2024-05-26 14:27:05 +02:00
- https://www.tenable.com/security/tns-2018-16
2024-06-09 00:33:16 +00:00
- https://www.tenable.com/security/tns-2018-16
2024-05-26 14:27:05 +02:00
- https://www.tenable.com/security/tns-2018-17
2024-06-09 00:33:16 +00:00
- https://www.tenable.com/security/tns-2018-17
2024-05-26 14:27:05 +02:00
#### Github
- https://github.com/ARPSyndicate/cvemon
- https://github.com/bbbrumley/portsmash
- https://github.com/codexlynx/hardware-attacks-state-of-the-art
- https://github.com/djschleen/ash
- https://github.com/mrodden/vyger
- https://github.com/nsacyber/Hardware-and-Firmware-Security-Guidance